On-chip ESD protection design is grand challenge in multi-GHz RF IC designs. While RF ICs typically demand for robust ESD protection, RF circuits are also extremely sensitive to any parasitic effects inherently associated with ESD protection structures. Hence, ESD protection will inevitably affects RF circuit performance. This lecture discusses critical aspects in practical designs, including a mixed-mode ESD simulation-design method for RF ESD protection design optimization and prediction, accurate RF ESD design characterization, complex ESD-IC interactions, ESD+RFIC co-design technique for whole-chip design optimization, etc. Real-world ESD-aware RF IC design examples will be presented
Albert Wang received the BSEE degree from the Tsinghua University, China, and the PhD EE degree from The State University of New York at Buffalo in 1985 and 1996, respectively. He was with the National Semiconductor Corporation from 1995 to 1998. From 1998 to 2007, He was Professor of Electrical and Computer Engineering at the Illinois Institute of Technology. Since 2007, he has been a Professor of Electrical and Computer Engineering at University of California, Riverside, where he is Director for the Laboratory for Integrated Circuits and Systems and Director for the University of California System-wide Center for Ubiquitous Communications by Light (UC-Light). His research interests focus on Analog/Mixed-Signal/RF ICs, Integrated Design-for-Reliability, IC CAD and Modelling, Systems-on-a-Chip, and emerging devices and circuits. Wang received the CAREER Award from the National Science Foundation in 2002. He is the author for the book “On-Chip ESD Protection for Integrated Circuits” (Kluwer, 2002) and more than 220 peer-reviewed papers in the field, and holds eleven U.S. patents. Wang was Associated Editor for IEEE Transactions on Circuits and Systems I, Editor for IEEE Electron Device Letters, Associate Editor for IEEE Transactions on Circuits and Systems II, Guest Editor-in-Chief for the IEEE Transactions on Electron Devices and Guest Editor for IEEE Journal of Solid-State Circuits. He has been IEEE Distinguished Lecturer for the Electron Devices Society, the Circuits and Systems Society and the Solid-State Circuits Society. He is President for IEEE Electron Devices Society (2014-2015). He was Chair for the IEEE CAS Analog Signal Processing Technical Committee (ASPTC). He was committee member for the SIA International Technology Roadmap for Semiconductor (ITRS). He serves as TPC Chair (2015) and General Chair (2016) for IEEE RFIC Symposium. He served as committee member for many IEEE conferences, e.g., IEDM, BCTM, ASICON, IRPS, IEDST, ICSICT, CICC, RFIC, APC-CAS, ASP-DAC, ISCAS, IPFA, ICEMAC, NewCAS, ISTC, AP-RASC, MAPE, EDSSC, MIEL, etc. He is a Fellow of IEEE and a Fellow of AAAS.