Departmental Seminar

Silicon Electronic Structure Modification: Beyond Impurity Doping

Dr Dirk Koenig
IMDC node, Engineering Faculty, University of New South Wales, Sydney

Impurity doping of silicon (Si) nano-volumes (NVs) as currently used in very large scale integration (VLSI) faces serious challenges at miniaturization efforts below the 14 nm technology node. Dopant out-diffusion, local density fluctuations and inactivation by clustering are major issues for Si field effect transistors (FETs). Self-purification and a massive increase in ionization energy cause doping to fail at Si nanocrystals (NCs) which show quantum confinement [1].

In analogy to the concept of modulation doping [2], I demonstrate a direct modulation doping method for silicon [3] using 1 mono layer (ML) Al in SiO2. By relocating the dopants from silicon to silicon dioxide, mentioned Si nanoscale doping problems are circumvented. In addition, the method provides excellent passivated hole selective tunnelling contacts as required for high-efficiency Si solar cells.

Picking B as example, I will show in theory and experiment that the choice of modulation acceptor is not trivial, rendering knowledge of acceptors in bulk Si inapplicable to SiO2 acceptor modulation doping. A screening of Grp. IIIA and IIIB elements by DFT shows that several alternatives to Al exist, offering a tuning of hole-selective contacts for Si solar cells and tunnel-FETs. I will elucidate atomistic and quantum-chemical parameters which decide over mentioned elements to be a modulation acceptor in SiO2.

Ideally, n- or p-type conductivity in VLSI-Si requires just energy offsets of lowest unoccupied states (LUS) and of highest occupied states (HOS) between different regions of the same VLSI-Si volume. As a result, doping would be eliminated altogether.

I will show in theory (analytics [4], DFT) and experiment (long-term synchrotron UPS, TEM, XPS, ERDA, PL, SIMS) that a few MLs of SiO2 (vs. Si3N4) achieve such an energy offset [5]. The induced n- (vs. p-) type behaviour in VLSI-Si can potentially be big enough to allow for band-to-band tunnelling (BTBT) for realizing extremely small and fast tunnel-FETs.


[1]  Sci. Rep. 5, 09702 (2015)                             [4]  in draft (2018)

[2]  Appl. Phys. Lett. 33, 665 (1978)                    [5]  Adv. Mater. Interfaces 1, 201400359 (2014)

[3]  Sci. Rep. 7, 46703 (2017)                             [6]  Beilstein J. Nanotech, under review (2018)

Date & time

Wed 4 Apr 2018, 2–3pm



Oliphant Seminar Room (414)


Members of RSPE welcome