Graphene could bring a variety of exceptional benefits in areas from electronics, optics/photonics, to communications, energy and biocompatible applications. Its atomic-thin nature makes it appealing for integrated technologies. The possibility of tuning its charge transport properties dynamically without the need for redesigning a device, offers a level of versatility previously unavailable with conventional thin-films.

However, despite the interest, the introduction of graphene into semiconductor technologies is complex. There are several specific challenges that graphene has encountered in this respect, starting from the need for a direct, consistent wafer-scale synthesis and to ensure reliability aspects.

Our approach is aimed at obtaining epitaxial graphene on silicon substrates in a site-selective fashion. The process is based on the use of a solid-state source of carbon – cubic silicon carbide on silicon – combined with a liquid-phase-epitaxy growth of graphene using a catalytic alloy of nickel and copper. This technology has allowed us to reveal for the first time the electronic transport properties of epitaxial graphene on 3C-SiC on silicon over large scales, revealing a sheet resistance comparable to that of epitaxial graphene on SiC wafers. We will show how the control of the graphene interfaces can be a more important factor than achieving large grain sizes. In addition, we indicate that, depending on the chosen application, well-engineered defects in graphene are key to achieving the desired performance. We will showcase this through our examples of integrated applications aimed to increase the number of functionalities available on a silicon platform.

Prof. Iacopi has over 20 years’ R&D experience in semiconductor Industry and Academia. Her research focus is the translation of basic scientific advances in nanomaterials and novel device concepts into industrial processes.